1. Field of the Invention
The present invention relates to a semiconductor integrated circuit and more particularly to a semiconductor integrated circuit which includes a central processing unit for executing an arithmetic processing, peripheral circuits associated with the central processing unit, and a circuit for selecting one of the central processing unit and the peripheral circuits and operating the selected one in a test mode.
2. Description of the Related Art
To produce one device including a central processing unit and one or more peripheral circuits, some prior art employs the steps of integrating a central processing unit and peripheral circuits on independent semiconductor chips and connecting these semiconductor integrated circuits with each other. The term "peripheral circuit" used herein refers to a random access memory, a read-only memory, an input and output interface, and the like. In such prior art the unit and circuits can be easily tested in a test mode, because it is possible to confirm a signal which is inputted in or outputted from the central processing unit from the outside.
To produce one device, on the other hand, other prior art employs the steps of integrating a central processing unit and peripheral circuits on a single semiconductor chip. That is, they are realized as one semiconductor integrated circuit like a large scale integrated circuit (abbreviated as an LSI). Such prior art is often designed to confine a signal which is inputted in or outputted from the central processing unit within the semiconductor chip. It means that it is impossible to confirm the signal from the external side. Therefore, in testing the finished semiconductor integrated circuit, no signal can be inputted in or outputted from the central processing unit without affecting the peripheral circuits. Hence, this prior art has a drawback in that it is substantially impossible to test each one of the central processing unit and the peripheral circuits individually.
To overcome the drawback, external terminals for the operation test have been conventionally added to the device for each peripheral circuit independently of the actually-used external terminals. These added external terminals are used for solely testing the central processing unit and the peripheral circuits.
In such an integrated circuit including the central processing unit and the peripheral circuits integrated on a single semiconductor chip, however, if the number of peripheral circuits are increased for expanding features, there is an increase in the external terminals dedicated to the test operation. The increase of the test-dedicated external terminals causes the outer size of the integrated circuit to expand more than required.